@ldcd@social.treehouse.systems
Post #4050042
2026-07-24 00:17 UTC
@gsuberland@chaos.social @whitequark@social.treehouse.systems @azonenberg@ioc.exchange do you have a screenshot of any bootflow config pages?
Replies (1)
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@gsuberland@chaos.social 2026-07-24 00:29
@ldcd@social.treehouse.systems @whitequark@social.treehouse.systems @azonenberg@ioc.exchange there are none. all you get in there is checkboxes for what you want to init in FSBL or APP runtime contexts. for the FSBL (what I would expect to run from SRAM) all I've got enabled is DDR, GIC1 and RCC. under CORTEX_A7 the only option is to enable MMU and cache in APP, no other settings. FreeRTOS also only gets ticked in APP; no FSBL option there. all the other stuff like FMC, ETH1/ETH2, I2C1, SPI1, SPI2, USART1, RTC, TIM1, DTS, etc. are in APP.