Post #1775763

2026-04-28 13:19 UTC

wafer.space bare dies and CoB have arrived! 🎉 These are from my open-source FABulous FPGA, which was part of the first shuttle run. It&#39;s a small FPGA with 480x LC, 6x MAC, 12x register files and 6x SRAM. The source files are available in the repository: https://github.com/mole99/gf180mcu-fabulous-fpga #OpenSource #ASIC #FPGA

Replies (6)

@mole99@fosstodon.org 2026-04-28 13:19

The chip was implemented using the wafer.space LibreLane template (https://github.com/wafer-space/gf180mcu-project-template) and uses Yosys and nextpnr for the FPGA toolchain. You can find all projects from the first wafer.space run here (ID: G801MOLE): https://github.com/wafer-space/ws-run1

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@tyalie@chaos.social 2026-04-28 17:10

@mole99@fosstodon.org this is really amazing. How do you know (and specially from where) what exactly to do here in what way for the silicon to work its magic? I'm also rly. interested to get into silicon circuit designs,, but I'm unsure where to even start.

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@WillFlux@mastodon.social 2026-04-29 08:14

@mole99@fosstodon.org brilliant! #FPGA hardware has been closed for far too long.

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@promovicz@chaos.social 2026-04-29 09:42

@mole99@fosstodon.org Thank you for such a cool contribution to open tech!

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@chaos@gts.schizofucked.monster 2026-04-29 09:44

@mole99@fosstodon.org smol! ^~^ is a cute lil chip

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@autkin@fosstodon.org 2026-04-29 20:42

@mole99@fosstodon.org cool! where was it fabricated geographically? Not in China even? https://en.wikipedia.org/wiki/GlobalFoundries#Fabrication_foundries_in_operation

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