Elektrine lite

← Feed

mole99

mole99@fosstodon.org

<p>Hi! I&#39;m Leo, an open-source silicon advocate. This means that I&#39;d like to advance chip design using open-source EDA tools and open-source PDKs. I am one of the maintainers of LibreLane and I regularly contribute to the three open-source PDKs (sky130, gf180mcu and ihp-sg13).<br />So how did I get there? Well, I wanted to understand computers at the deepest level, and transistors are pretty much the bottom of it all as far as I&#39;m concerned :)</p>

Posts

  • Post #4239938

    wafer.space Run 2 is now officially in production! 🥳🚀 In short, wafer.space (https://wafer.space/) offers low-volume silicon manufacturing of 1,000 custom silicon chips for the open-source GF180MCU process. Like last time, this shuttle features some incredible designs. Read on for more ⬇️ #OpenSource #ASIC #WaferSpace

  • Post #1775763

    wafer.space bare dies and CoB have arrived! 🎉 These are from my open-source FABulous FPGA, which was part of the first shuttle run. It&amp;#39;s a small FPGA with 480x LC, 6x MAC, 12x register files and 6x SRAM. The source files are available in the repository: https://github.com/mole99/gf180mcu-fabulous-fpga #OpenSource #ASIC #FPGA

  • Post #1173544

    Greyhound is alive! 🐶 Last week, I posted about soldering my custom chips onto breakout boards. Now, I can finally say that Greyhound is working 🎉 If the video below doesn&amp;#39;t work, you can also view it on Peertube: https://makertube.net/w/3rQ8a7WxTYcr1BQY9nCUat I&amp;#39;m incredibly happy that Greyhound is no longer just theoretical, but that it can run examples on its FPGA in the real world 🤩 Greyhound repository: https://github.com/mole99/greyhound-ihp #FPGA #ASIC

  • Post #1095751

    First time soldering my own chip! 👏 It&amp;#39;s also the first time I&amp;#39;ve used a stencil. The chip is my Greyhound v1 (http://github.com/mole99/greyhound-ihp), designed for the IHP SG13 process family. Read on for the full thread ⬇️

  • Post #920698

    And another chip submitted for tapeout - HeiChips 🎉 This one has been in the works for some time, but since the shuttle was canceled last fall, it was postponed to a later one. It&amp;#39;s an open-source chip featuring user projects created by participants of the HeiChips Summer School 2025 (https://heichips.github.io/). How cool is that? The chip uses 9mm² of silicon on SG13CMOS and has been submitted to IHP&amp;#39;s Low-Cost MPW shuttle (https://dk.ihp-microelectronics.com/OpenSourceReques...

  • Post #804688

    LibreLane 3.0 has officially been released! 🎉 With this release, LibreLane finally has a logo! What&amp;#39;s more, we now have a website showcasing LibreLane&amp;#39;s capabilities, as well as a blog featuring development updates and announcements. Read the full blog post here: http://www.librelane.org/blog/2026-03-25-website_release_3-0 LibreLane website: https://librelane.org/ Install LibreLane today: http://docs.librelane.org/ #FOSSi #LibreLane #OpenSource

  • Post #804686

    A Tiny FABulous FPGA on Tiny Tapeout? It&amp;#39;s more likely than you think! Yesterday the TTIHP26a shuttle (https://app.tinytapeout.com/shuttles/ttihp26a) from #TinyTapeout has closed. In it, hundreds of incredible projects. You can view the full shuttle and its designs here: https://app.tinytapeout.com/projects/3744 I had the opportunity to submit an FPGA, which I created using my FABulous LibreLane plugin. For this fabric, I developed a &amp;quot;tiny&amp;quot; tile library that better fi...

  • Post #676344

    Tiny Tapeout is hosting the first demoscene competition for ASICs! 🕹️ Get ready to compete with your own design and win a variety of prices, including whole wafers! Or you just do it for fun 😉️ The goal is to create a design that targets 2 tiles or less and uses the Tiny VGA Pmod to create nice visuals and the Audio Pmod to play some cool tunes! #TinyTapeout #ASIC #OpenSource