Post #2609650
2026-04-28 13:19 UTC
The chip was implemented using the wafer.space LibreLane template (https://github.com/wafer-space/gf180mcu-project-template) and uses Yosys and nextpnr for the FPGA toolchain.
You can find all projects from the first wafer.space run here (ID: G801MOLE): https://github.com/wafer-space/ws-run1
Replies (1)
-
@mole99@fosstodon.org 2026-04-28 13:20
If you would also like to tape out, registration for the second shuttle run is currently open: https://buy.wafer.space/