Post #4239937

The shuttle includes various RISC-V SoCs, a "3D" ray caster, a 100Mbps 4-port Ethernet switch and beacon, a dual Core BIO from #Baochip1x, three different #TinyTapeout chips, and much more! There are also a number of designs that use the new community-created standard cell library, which is both faster and uses less power: a Linux-capable RISC-V SoC with MMU and FABulous FPGA. Finally, there are new SRAM macros and inductors for validation and characterization, to be used in future runs.