Post #4050053
2026-07-24 00:03 UTC
@whitequark@social.treehouse.systems not a clue, tbh. I'm not super familiar with the details of the memory model on these MPUs. I'm just following the wizard in CubeMX.
within CubeMX it's just DRAM bringup, clock tree, and some peripheral config on the Boot side. then on the Application side I've got some more stuff like wolfSSL.
my assumption, based on some examples and guides I looked through, was that the Boot part runs from SRAM, brings up DRAM, then the larger Application stuff goes from there. if not, uh, huh?
Replies (1)
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@ldcd@social.treehouse.systems 2026-07-24 00:07
@gsuberland@chaos.social @whitequark@social.treehouse.systems for MP2 (although I think MP1 is very similar), the bootrom loads a binary from QSPI flash or EMMC. (I think @azonenberg@ioc.exchange wrote something to stuff the appropriate headers from an elf file onto a raw binary) From there the canonical bootflow is to load BL31 from that binary into SRAM which performs basic platform setup, loads the DRAM training blob into the ARC CPU and then jumps to the user code section