Post #2991565

2026-03-05 08:15 UTC

@jann@infosec.exchange @ljrk@todon.eu I wonder why it is still necessary to employ imperfect mechanisms like guard pages to avoid stack overflows. Shouldn't it be possible to have a stack pointer limit checked by hardware? Like https://interrupt.memfault.com/blog/using-psp-msp-limit-registers-for-stack-overflow on some ARM chips?

Replies (2)

@ljrk@todon.eu 2026-03-05 08:25

@jannic@hachyderm.io @jann@infosec.exchange Yes, but turning this one is trickier in two ways: 1. Some of these features still require compiler hardening flags to work/wiring 2. It's sometimes harder to selectively enable, which can pose problems if programs suddenly stop working, especially 3rd party apps. Generally though yes, this would be a good approach. GrapheneOS makes use of such hardware features much more aggressively for example!

Open ##2991566
@jann@infosec.exchange 2026-03-05 12:38

@jannic@hachyderm.io that MSPLIM thing you linked to seems to be specific to Cortex-M chips, probably for when you don't have an MMU? When you have an MMU, I imagine explicit stack pointer limit checks probably cause unnecessary hardware overhead compared to relying on implicit bounding by guard pages?

Open ##2991567