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@SlurpingPus@lemmy.world

Post #2170449

2026-04-03 04:18 UTC

Yeah, what I've read is that ARM is in fact a mix of RISC and CISC. And meanwhile x64 processors turn some CISC instructions into a bunch of simpler ones as one of the first execution stages. So in the end the situation is basically this: ![](https://lemmy.ml/api/v3/image_proxy?url=https%3A%2F%2Flemmy.world%2Fpictrs%2Fimage%2F5cf04822-6b7a-4638-9776-625a3cdfaf4b.webp)

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