@whitequark@social.treehouse.systems
Post #4135507
2026-07-27 11:10 UTC
EE folks: what's a good configurable clock synthesizer chip?
requirements:
two outputs, 3.3V (diff or single-ended)wide range of frequencies up to 250..400 MHz (for FPGA input)can be configured using a relatively simple algorithm, as opposed to a closed-source Windows application
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