Post #3924957
2026-07-19 02:19 UTC
Question for FPGA/ASIC friends, anynyan know of a good huge collection of RTL files?
I need to build a massive corpus for profiling a language frontend, I'm thinking about seeing what I can slurp from OpenCores, but if there are pre-built corpora out there I am interested.
I'm also working on putting together an HDL standard verification suite for Verilog/SystemVerilog/Verilog-AMS/VHDL/VHDL-AMS, so eventually forming corpora for all of those would be nice.
Replies (1)
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@azonenberg@ioc.exchange 2026-07-19 02:30
@lethalbit@chaos.social somebody on LinkedIn was just posting about some benchmarks for eda tooling assembled from various open codebase let me try to see if i can find the link