Post #3788839
2026-07-11 21:16 UTC
CPU architecture in which all instructions that access data in memory *require* you to specify the byte order of the value in memory
Replies (1)
-
@david_chisnall@infosec.exchange 2026-07-12 16:54
@zwol@masto.hackers.town This one I would vote no for because everyone has pretty much given up on big endian because it doesn’t really have any benefits (and does have some minor down sides) for ABIs and because adding a byte-swap instruction after a load or before a store costs basically nothing on a modern system, but burning half of the load-store encoding space (which is an enormous part of the total on well-designed ISAs) on a rarely-used feature is incredibly wasteful.