Post #3537900

After having had another succesful meeting with my topical mentor for my Bachelor Thesis project (I'm doing practical EE and Embedded programming in an way more than computer-science bachelor-thesis scope) I am positive I'm on a good track for a sucessful project. I'm building a network-DAC, that outputs control-signals for laser-projectors and gets feed from Ethernet. I don't have to worry about the networking and protocol side of things as I port the OpenIDN Laserdac framework onto my custom STM32H743 based PCB. Most glue-logic for LwIP and the microcontroller-MAC was already done by somebody else and I could build upon their work to get networking going. My big software-side is implementing an output-adapter that can stream samples over to 2 SPI-connected DACs with per-sample perfect timing. I am now on a path where I have a HW-timer & DMA based solution, that only requires CPU-intervention to refill the sample/timing buffers or to apply double-buffering. I got so deep down the rabbit hole I explored almost all possible memory optimizations accounting for DMA-FIFO behaviors and their implications on the 1st sample timings. So far the things I learned about is, that realtime audio is a walk in the park compared to this... If anybody is interested in the project, both Firmware and PCB design files are on my codeberg (see bio) (everything is still WIP and the PCB def. needs at least another change) Open for any questions if interested as that would obviously help me find interesting/important points I'll point out in my thesis. #electronics #embedded #stm32