Post #3499697

Same problem. But it does start to work when I increase the flash SPI clock divisor. So it could be a signal integrity problem. But there's another clue. The below scope traces are from the "hello_uart" example. Running this several times shows that the timing is changing from run to run, and it shouldn't be. At the 115200 baud rate, only the latter part of it is decodable. If you increase the baud rate, the earlier character start to decode. I think we have a clock stability problem. I kinda just put 33pF load caps in here. I bet that's for the HC49 cans, and I need smaller ones for the SMD crystal I'm using.