Post #3062337

The very notion of a “constant-time branch” seems iffy: a whole new RISC-V instruction with specific scheduler treatment, and very little expressivity as it wouldn’t encode backwards jumps (obviously) and probably not jumps to beyond a dozen bytes either. So might this new requirement of supporting constant-time code finally cause RISC-V to add a conditional select instruction as part of the base ISA (or an official extension)? That would seem the most likely outcome.