Post #2773657

@cmb@cathode.church I don't think what you're trying to do there will work; DIR still needs to be driven by the FPGA and if you swap the directions the 1T45 will reference that input to Vio… and the FPGA probably won't meet Vil thresholds for the very low voltage ranges (0.315V for Vio=0.9V) and won't meet Vih (3.5V) for 5V either... I would instead create a "+3V3 1T45" net (only one, for all 1T45 chips) and switch that whole net off while the FPGA is not ready.