Post #1647245

2026-04-03 17:25 UTC

ASIC4 can work in three different modes: Pack (storage) mode: This is completely compatible with a normal ASIC5, so that it works with older SIBO devices like the MC range and the original Series 3. Accessed with ID:2, just like a normal ASIC5.Extended SSD mode: Can (or not? see the next post) address up to 4x 256MB memory devices. Accessed with ID:6, plus a pull-down on the Mode bit (M=0).Extended Mixed mode: Same as Extended SSD mode, but moves the storage to CS4-CS7 and also adds an extra 4 "peripheral" (IO) devices at CS0-CS4. Accessed with ID:6, plus a pull-up on the Mode bit (M=1). The description of this in the #Psion SIBO HDK is a little confusing. Maybe it's just me, but I've read this paragraph regularly over the course of 8 years and it's only today that I think I've got a grasp of what it actually means. However, the HDK misses one vital piece of information.

Replies (1)

@thelastpsion@oldbytes.space 2026-04-03 20:47

When first talking to ASIC4, this is the process: Master "selects" slave ID:6 ("Hello, am I talking to ASIC4?").Master requests a byte. if it's ASIC4, it'll get a non-zero response ("Yes, I am, and here's how I'm set up.") This includes the device (chip) size information (1 = 32K, 2 = 64K, etc).If ASIC4 sends a non-zero response, master reads a byte from ASIC4's Register 1. ASIC4 sends an "extended info" byte with more information.Master then requests to send a byte to ASIC4's Register 1, and sends back the device size info. This last step always confused me. I can't see it mentioned anywhere in the SDK, but it's clear to see in my logic probe captures. If you don't do this, you only see the first 32K of each device (device size of 0 also means 32K). I had no idea why this was needed, but I accepted it and added a comment to the code to come back to it later. Chekhov's byte.

Open ##1647246