Post #1286709
2025-07-29 13:21 UTC
Replies (4)
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@wren6991@types.pl 2025-07-30 02:48
Since people are doing the thing I explicitly asked them not to do: we accidentally case-analysed the timing through the tie cells that are read through that register. Changing bits 2 or 3 would cause a setup violation. For A3 we fixed the timing on bit 3 by reimplementing that part of the bus mux with an ECO cell and stealing a nearby buffer. It wasn't possible to fix bit 2 in the same way, so we can't use the value 0x4. The same issue applies to the tie-cell-programmable IDAU watermark over the ROM, as described here in the bootrom source: https://github.com/raspberrypi/pico-bootrom-rp2350/blob/c6cdb1711f32c3e34faaebd58618a6d096dbd52e/src/main/arm/arm8_bootrom_rt0.S#L238-L264
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@lambda@chaosfurs.social 2025-07-29 13:25
@wren6991 is it related to one of those little X's in the image being off by a pixel
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@mimir@meow.social 2025-07-30 01:17
@wren6991 ah, of course, n!+(n-1)!, so the next stepping is ID 0x1E
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@ignaloidas@not.acu.lt 2025-07-29 20:28
@wren6991@types.pl ohno "typo'd" the wrong bit? (my guess it's shuffled in the mask for some reason)